Windows Phone Thoughts: Jackito's TDA: Tactile Digital Assistant?

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Tuesday, July 13, 2004

Jackito's TDA: Tactile Digital Assistant?

Posted by Janak Parekh in "OFF-TOPIC" @ 08:00 AM

http://www.jackito-pda.com/index.php

From out of left field comes this unique and unusual device -- a PDA that's designed to be operated by solely thumbs, or a TDA, where the T stands for Tactile.



It uses its own proprietary operating system, "3ActilOS", and it boasts insane battery life -- 10 hours (color) or weeks-to-months (black-and-white) on a single AA battery. It claims to offer this via an innovative "7-processor" parallel computing architecture, where 5 of the processors seem to be driven by FPGA technology. Sounds hard to believe, especially with the $600+ price tag and requested $100 deposit for early orders? I thought the same thing, and ran it by our local community moderator and FPGA expert, Kati, who happens to have a Ph.D. in the subject. Her opinion follows, along with a poll -- what do you think?

Kati Compton said: I took a quick glance at their site, and it's a bit difficult to decipher. They use terminology in places that I personally am not familiar with. It is difficult to tell for those terms if rough translation is the issue, or if they are referring to an area of computer architecture I have not studied. For example, "reversible automata". This term means that you can run through a computation forwards or backwards. Use the outputs of the computation as inputs, and you get the original inputs back [1]. This site does not explain what these automata implemented in the FPGA even are, let alone how it helps that they are reversible.

At any rate, the idea of using an FPGA in an embedded device is a sound one. There are many many research groups looking into this, in fact. Why? Well, let me give a brief idea of what reconfigurable hardware (which includes FPGAs) can do in computing. There are many uses, but I'll focus on the one that is most critical to embedded devices. FPGAs can implement a wide variety of circuits in hardware. Basically, by turning certain transistors on or off, they can compute different small logic functions, and by turning other transistors on and off, they can connect these logic functions in different ways to form a larger circuit. The on/off state of these transistors is controlled by bits of SRAM. To load a particular circuit into the FPGA, you simply load that SRAM with the appropriate bits. Unlike a standard microprocessor, there is no need (unless the designer wishes it, but that's another story) to fetch individual instructions from memory, decode what they are, act on them, and store the results to a register file. Doing this takes up time, and uses power. On a programmed FPGA, the circuit is just THERE.

The benefits of using FPGAs then are that the computations, if they are of the right flavor, are done using a higher degree of parallelism, and lower power (because we're not fetching instructions, etc). You may have a lower MHz rating, but depending on pin limitations of the FPGA device, you can have more data throughput. It's the pin limitations (ie, the number of wires connecting to the FPGA) that make implementing FPGA technology on the same chip as a controlling microprocessor and RAM very attractive. This is actually where the bulk of the research is focused.

Anyway, my evaluation at this point is that the idea isn't unreasonable, I'm glad to see someone commercial working on it, but there's not enough information on the site to really evaluate what they are doing, and some of their statements don't quite make sense to me. Ignoring the "reverse automata" issue, they claim to be using the FPGA to implement 5 "processors". But they're not quite clear on what they mean. That probably doesn't mean implementing 5 XScales in the FPGA. It could be 5 adders for all we know. These processors are used to process more data simultaneously. However, it should be noted that in parallel computing, 7 processors times 10 MHz is rarely 70 MHz for various overhead reasons. Without knowing the structure of what they actually *are* implementing in the FPGA, I can't really determine the quality of their architecture.

[1] K. Svozil, Logic of Reversible Automata, International Journal of Theoretical Physics, Vol 39, No 3, 2000.

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